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Total experience of 8 YEARS as FPGA IP Design engineer. 4 Years of experience as FPGA IP DESIGN ENGINNER AT INTEL/Altera. 1 Year 6 months of experienc... View More
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Certifications
- VSD- Static Timing Analysis - I and VSD- Static Timing Analysis - II on Udemy. The certificate earned in May 2018. System Verilog Beginner: Write Your First Design and Test Bench Module on Udemy. The certificate earned in June 2018. System Verilog Function Coverage Language/Methodology/apps on Udemy. The certificate earned on July 2018. Attended the workshop on ARDUINO BOT conducted by Robosoft systems at the IIT-Bombay Attended the workshop on LabVIEW Programming conducted by Measurement's & sensor Division at VIT University, Vellore.
To secure a challenging position in the field of VLSI Design where I can effectively contribute my skills and grow professionally while contributing t... View More
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Results-oriented professional with expertise in strategic planning and relationship management in dynamic business environments. Proficient in market ... View More
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Detail-oriented, organized, and meticulous employee. Works at a fast pace to meet tight deadlines. Enthusiastic team player ready to contribute to co... View More
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Computer Engineering student with a specialty in FPGA or microcontroller design. Proficient in incorporating digital design theory into VHDL and Veril... View More
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Detail-oriented, organized, and meticulous employee. Works at a fast pace to meet tight deadlines. Enthusiastic team player ready to contribute to com... View More
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Enthusiastic and adaptable Master's student passionate about exploring the intricacies of hardware design and programming, with a keen interest in tac... View More
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Certifications
- LFD110: Introduction to RISC-V by the Linux Foundation
- The Joy of Computing Using Python - NPTEL
- LFQ101: Fundamentals of Quantum Computing