xilinx vivado Search Results
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Jonathan Yun
Professional researcher and electronics designer with strong analytical skills, adept at designing and conducting experiments and research in the fiel... View More
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KRISHNA KISHOR
Seasoned Senior Hardware Engineer armed with robust experience in designing, testing and troubleshooting complex hardware systems. Strengths include a... View More
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Certifications
- VLSI SoC Design using Verilog HDL, Certified in Maven Silicon course on VLSI SoC Design using Verilog HDL which included VLSI Introduction, SoC Design, ASIC Vs FPGA, VLSI Design Flow, and Verilog HDL essentials. Basic concepts of data types, Verilog operators, system tasks and functions, and engage in hands-on Verilog labs
- Machine learning using Python, certified in a Udemy course on machine learning using Python, which included basic machine learning algorithms and deep learning models, with an online assessment score of 97%
- System Verilog Fundamentals, completed a certified course on System Verilog Fundamentals, covering key concepts in hardware design, verification methodologies, and advanced RTL coding techniques
David Pastuch
Experienced with FPGA design and integration in custom SDR applications. Primarily utilizes VHDL, Verilog and C to create embedded designs for Zynq 70... View More
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Vishnu Gorpuni
Results-driven VLSI engineer with expertise in designing and implementing complex integrated circuits. Skilled in Microarchitecture Design, Logic Impl... View More
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Soumya Rai
Dynamic R&D Staff Engineer at Synopsys with expertise in SystemVerilog and UVM, specializing in DDR5 protocol verification. Proven track record in dev... View More
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Certifications
- Verilog HDL: VLSI Hardware Design Comprehensive Masterclass
- Python 101
SAIKRISHNA PENJARLA
Design Verification Engineer skilled in ensuring the functionality, correctness, and reliability of complex digital designs. Expertise in creating and... View More
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Luke R. Morrison
Standout Senior Level Computer Engineering Student with specialty in ASIC, Digital Verification, RTL Design and Embedded Software
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Cissy Jose
Dynamic ASIC Front End RTL Design Engineer with 7 years of extensive experience in RTL design, recognized for delivering innovative and efficient solu... View More
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Certifications
- PG Diploma in VLSI and Embedded Systems from NIELIT Calicut
DINSHITH D
FPGA Engineer with 3 years of experience in RTL design, functional verification, synthesis, place and route and timing closure. Proficient in Verilog ... View More