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Ashwin Jose Kattikaran
RTL Design Engineer with 2.5 years of experience in SOC Front-end Design. Interested in expanding my area of expertise to multi-processor architecture... View More
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Rahul Lodwal
Design Verification Engineer with 3 years of experience in digital front-end verification, EDA tool enablement, and automation. Proficient in SystemVe... View More
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Certifications
- Successfully completed badge exam of System Verilog for Design and Verification by Cadence.
- Successfully completed badge exam of UVM for Design and Verification by Cadence.
RAVI P
Experienced semiconductor professional skilled in RTL design, physical design, and research. Proficient in the entire design flow from RTL coding to G... View More
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Kyrillos Magdi GHOBRIAL
Junior Hardware ASIC Digital Design Verification Engineer with a strong passion for communication technologies and complex system verification. Experi... View More
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Pooja Rawat
Results-driven VLSI professional with a passion for advancing career in the semiconductor industry. Seeking a challenging role in a dynamic environmen... View More
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Pranjal Giri
Accomplished Senior DFT Engineer at Texas Instruments with expertise in ATPG analysis and low-power DFT implementation with a proven track record in e... View More
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Shivani J
Design Verification Engineer with 6 years of experience across SoC, IP, and AMS verification. Contributed to 7+ microcontroller devices and DLP chipse... View More
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SANJANA BELDI
Experienced in Design Verification with almost 2 years of hands-on work. Expertise with UVM testbench development. Strong ability to design, de... View More
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Certifications
- Business English Certificate Cambridge Assessment September 2019 CEFR LEVEL B1, score-149
- GATE 2022 EC IIT Kharagpur February 2022 Rank-5867, score-379
- NPTEL Online Certification of Introduction to IoT - IIT KharagpurJul-Oct 2023 Score- Elite, Percentage: 69%
Devang Sharma
Top Skills
Certifications
- RTL to GDSII ASIC Design Flow:Hands-on training in full and semi-custom ASIC design using Cadence tools suite from RTL to tapeout, including STA.
- Digital IC Design: Gained deep practical understanding of transistors (MOSFET/BJT) and built optimized ICs from scratch using CMOS, pass transistor, and transmission gate logic.
- Verilog for an FPGA Engineer: Designed FSMs, ALU and sequential circuits in Verilog synthesized and implemented them on Xilinx Zedboard using Vivado.
SHIVA REDDY VARAKANTHAM
• 3+ years of experience ASIC & Sub-System Verification. • Good knowledge and hands on experience in System Verilog and UVM based coding. • Practical ... View More