uvm methodology Search Results
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ABHINAV LOKA
Dynamic FPGA professional specializing in digital design, VHDL/Verilog coding, and hardware simulation, with a proven ability to deliver efficient, h... View More
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Certifications
- Advanced VLSI Design and Verification Course - Maven Silicon [Aug 2021 - June 2022]
Chiranjeevi panditha
Design verification engineer with 8 years of expertise in RTL, IP, and block-level verification and validation, proficient in SystemVerilog, Verilog, ... View More
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Xiaoyang Liu
Principal Software Engineer with strong expertise in low-level C development, hardware bring-up, and embedded systems debug. Experienced in DisplayPor... View More
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Valmor Cordeiro
A seasoned Principal Verification Engineer with a proven track record at Renesas Electronics, I excel in leading multi-site teams through complex digi... View More
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Punith R
Accomplished Senior ASIC Verification Engineer with a proven track record at Company Name, specializing in SystemVerilog and UVM methodology. Enhanced... View More
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Certifications
- Certificate in ASIC Verification, [Issuing Institution], [Year]
- Certificate in Advanced Verification Methodologies, [Issuing Institution], [Year]
Rainer plass
Verification professional with strong background in digital logic design, hardware verification, and simulation. Skilled in utilizing industry-standa... View More
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Swetha S
Engineering professional with solid foundation in design verification, committed to delivering high-quality results. Known for collaborative team effo... View More
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Nithin Joseph
Experienced with advanced VLSI verification methodologies, ensuring high-quality deliverables. Utilizes industry-standard tools to streamline verific... View More
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Certifications
- IoT Online NPTEL Course, Indian Institute of Technology Madras
- Arduino Programming, Indian Institute of Technology Madras
- VLSI System On Chip Design - Overview, Maven Silicon
Seungwon Roh
Accomplished Design Verification Engineer at Samsung Electronics, skilled in functional coverage and UVM methodology. Enhanced verification efficiency... View More
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TEE SHENG YANG
Dynamic Design Verification Engineer with a proven track record at Intel Malaysia, excelling in integrated circuit design and IP verification. Adept a... View More