synopsys vcs Search Results
Filters
Francisco Hernandez
Computer Engineering student with a specialty in FPGA or microcontroller design. Proficient in incorporating digital design theory into VHDL and Veril... View More
Top Skills
Sejal Gami
Experienced professional with 6 years in ASIC/FPGA verification domain. Proficient in developing reusable UVCs using SV and UVM methodology. Skilled i... View More
Top Skills
Certifications
- SystemVerilog Certification by Siemens on April 2020.
- UVM Certification by Siemens on May 2020.
- Linux Training by IIT, Bombay on March 2014.
Shrividhya Srinivasan
Dynamic professional with a strong background in database management and programming, honed at Cognizant Technology Solutions. Proficient in SQL and P... View More
Top Skills
Samana Achar
With over 9 years of experience in the IT industry, I have honed my skills in RTL design for ASIC, dedicating 7 years to this specialized field. I als... View More
Top Skills
Prabeen Kumar Padhy
Dynamic Senior Verification Engineer with extensive experience at Scaledge and a proven track record in PCIe Gen5 and NVMe verification. Expert in dev... View More
Top Skills
JOEPRABHU
To ensure the development of high-quality, secure, and efficient software by leveraging tools like Coverity, Cpplint, and Valgrind, and following the ... View More
Top Skills
Abdullah Hassaan Ahmad
ASIC Design Engineer with 1+ years of experience in RTL design/Verification using Verilog/SV, UVM, and C/C++. Skilled in creating test benches, collab... View More
Top Skills
Certifications
- AI Infrastructure and Operations Fundamentals (GPU Computing) - NVIDIA
NITISH KUMAR
Experienced GPU Logic Design Engineer with 3+ years of experience as GPU RTL integration engineer and 1 year internship experience with CPU PD backend... View More
Top Skills
Soumya Rai
Dynamic R&D Staff Engineer at Synopsys with expertise in SystemVerilog and UVM, specializing in DDR5 protocol verification. Proven track record in dev... View More
Top Skills
Certifications
- Verilog HDL: VLSI Hardware Design Comprehensive Masterclass
- Python 101
Sai Nitish Chamiraju
Collaborative Design Verification Engineer with 10 years of experience leading design, verification of SOC and Subsystem IPs. Considered valuable asse... View More



