jaspergold Search Results
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5+ years of experienced in RTL design using Verilog/VHDL, performed CDC, LINT and DFT checks on modules, additional checks using JasperGold, familiar ... View More
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Accomplished Senior DFT Engineer at Texas Instruments with expertise in ATPG analysis and low-power DFT implementation with a proven track record in e... View More
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Design Verification Engineer with 6 years of experience across SoC, IP, and AMS verification. Contributed to 7+ microcontroller devices and DLP chipse... View More
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Stanford EECS student pursuing Digital System Design, VLSI, and Hardware Engineering. VLSI research, Worked for Nobel Prize Winner and Secretary of En... View More
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Hardware Verification Engineer with over 6+ years of experience with formal verification and model checking. Have led the project development of both ... View More
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Innovative ASIC Engineer with 7+ years of experience in high-performance and low power digital systems and micro-architecture definition. Expert in fu... View More
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Certifications
- Comprehensive Digital IC Implementation and Sign-Off training using Synopsys Fusion Compiler
- EUROPRACITCE
Dynamic Design Verification Engineer with a proven track record at Texas Instruments and RapidSilicon, excelling in UVM methodologies and mixed-signal... View More
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Seeking a position to utilize my skills and abilities in the field of VLSI Designs Verification offers professional growth while being sincere, resour... View More
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Experienced Electronics and ASIC Verification Engineer with extensive expertise in Electronic Design Automation (EDA) tools, pre-silicon and post-sili... View More
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Certifications
- SystemVerilog and Universal Verification Methodology (UVM) Certification
- Formal Verification Techniques and Applications
- Cadence EDA Tools Advanced Training
Front-end design verification engineer with 7+ years of experience in the semiconductor industry. Possesses a strong technical background, and prob... View More

