gate level simulations Search Results

Accomplished Staff Engineer at Analog Devices with a proven track record in managing complex projects to successful completion. Expert in Microarchite... View More

Engineering professional with solid foundation in design verification, committed to delivering high-quality results. Experienced with verification me... View More

I have total of 9+ years experience in SOC Design. Well versed in different aspects of chip design. Strong knowledge in Verification, DFT, Validation ... View More

Design verification engineer with 8 years of expertise in RTL, IP, and block-level verification and validation, proficient in SystemVerilog, Verilog, ... View More

Verification professional with strong background in digital logic design, hardware verification, and simulation. Skilled in utilizing industry-standa... View More

Accomplished Design Verification Engineer at Samsung Electronics, skilled in functional coverage and UVM methodology. Enhanced verification efficiency... View More

Seeking Supervisory Position in Production/Warehouse Intelligent and qualified Validation Engineer with extensive experience assessing software system... View More

Organized and dependable candidate successful at managing multiple priorities with a positive attitude. Willingness to take on added responsibilities ... View More

ASIC Design Verification with 13 years in SSD, HDD, Automotives projects. Solid familiarity with the steps involved in the creation of an ASIC, includ... View More

Verification Engineer with 1 year of experience at Micron, specializing in LPDDR5 memory array level verification using UVM methodology. Proficient in... View More