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Punith R

Accomplished Senior ASIC Verification Engineer with a proven track record at Company Name, specializing in SystemVerilog and UVM methodology. Enhanced... View More

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Certifications

  • Certificate in ASIC Verification, [Issuing Institution], [Year]
  • Certificate in Advanced Verification Methodologies, [Issuing Institution], [Year]

URVISH JANI

Verification Engineer with 1 year of experience at Micron, specializing in LPDDR5 memory array level verification using UVM methodology. Proficient in... View More

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Certifications

  • Python Programming – NPTEL, IIT Madras
  • Verilog HDL: VLSI Hardware Design Comprehensive Masterclass – Udemy
Vigneshwar S

Vigneshwar S

Engineering professional with solid foundation in design verification, committed to delivering high-quality results. Experienced with verification me... View More

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Chiranjeevi panditha

Design verification engineer with 8 years of expertise in RTL, IP, and block-level verification and validation, proficient in SystemVerilog, Verilog, ... View More

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Soumya Rai

Dynamic R&D Staff Engineer at Synopsys with expertise in SystemVerilog and UVM, specializing in DDR5 protocol verification. Proven track record in dev... View More

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Certifications

  • Verilog HDL: VLSI Hardware Design Comprehensive Masterclass
  • Python 101

Rainer plass

Verification professional with strong background in digital logic design, hardware verification, and simulation. Skilled in utilizing industry-standa... View More

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Swetha S

Swetha S

Engineering professional with solid foundation in design verification, committed to delivering high-quality results. Known for collaborative team effo... View More

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Tareq Sarhan

Tareq Sarhan

Full DLX Processor Implementation (2025) As part of an advanced digital systems project, I designed and implemented a complete DLX pipelined processor... View More

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Seungwon Roh

Accomplished Design Verification Engineer at Samsung Electronics, skilled in functional coverage and UVM methodology. Enhanced verification efficiency... View More

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Gourish Singla

Accomplished Senior Member of Technical Staff at Siemens EDA, recognized for driving a 90% reduction in functional coverage time. Expert in SystemVeri... View More

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