Software Assurance Engineer professional with strong track record in ensuring software quality and reliability. Extensive understanding of software lifecycle concepts including requirement definition and flow, software design and development, complex system testing, and customer acceptance. Known for effective team collaboration, adaptability to changing project needs, and results-driven approach. Adept at both Waterfall and Agile software development processes. Skilled in manual and automated testing, bug tracking, and test case management, with focus on delivering high-quality software products.
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Project Leader with extensive experience in all life-cycle phases of Client/Server applications development. Proven ability to assess customer needs and deliver precise solutions efficiently. Experienced in client support during development and implementation processes. Recognized for leadership skills and fostering team collaboration to achieve project goals.
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Seeking a dynamic position in: Digital Logic Design targeted towards FPGA Design in System Oriented Companies with Verilog, System Verilog and VHDL as RTL designer. Also has experience and capability in UVM. Senior FPGA Design Engineer offering 24 years of experience in FPGA design engineering Expertise in a Nutshell: FPGA design with Verilog/VHDL (RTL) and ability to generate testbenches with Verilog/VHDL and UVM. understanding of Serdes PCS, Comma detection and alignment, 8b/10b decoder, LFSR scrambler .Deep understanding of AXI bus protocol, Synopsys DW I2C APB . Deep understanding of Signal processing concepts such as : FIR filters, FFT, z-plane , FIR poly phase filters for sampling rate conversion, DDS and Cordic, De-emphasis, equalization. Deep understanding and Signal Analysis of Synopsys PCI Express Design IP. Deep understanding of High speed Serdes Architecture, PCI Express , SAS ,SATA, USB 3.0 , Aurora Protocol. Implementation of Aurora protocol in Verilog and VHDL Interesting Home Project: Design of a Deskew Circuit (Channel bonding) with Verilog (RTL) for DeSkewing a X4 Lane . Design uses: serializer, de-serializer, Crossing Clock domain Fifo, Comma Detection Align, Sort Algorithm for finding the deskew Description of UVM Projects: Design of UVM Force agent for changing the trigger threshold of a comparator for Lecroy in 2010-2011 Design of UVM full testbench for RTX for Verification of RF FPGA that was responsible to interact with the main FPGA of the system through custom serial interface and implements of ADC gating functions. 2024
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Dynamic Team Leader with extensive experience at HII Fleet Support Group, excelling in equipment installation and mechanical troubleshooting. Proven track record in quality assurance and safety, enhancing team efficiency and operational readiness. Skilled in technical documentation and reporting, fostering collaboration to achieve project goals and drive continuous improvement.
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Motivated Senior Software Engineer highly effective at developing new programs and fixing problems with existing systems. Proficient in Java and Agile/Scrum methodology. Proficient in a wide range of languages, frameworks, and stacks including Java, Spring Framework, Spring Cloud, and Kubernetes. Demonstrated expertise in designing, implementing, and troubleshooting software within large-scale distributed systems. Recognized for taking ownership, delivering results, and working collaboratively in team environments.
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Detail-oriented professional with extensive experience in PCB manufacturability and quality assurance. Known for strong communication and supplier chain partnership abilities to achieve optimal results and minimize defects.
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To be able to contribute to a Company's growth, development and goals which offers professional challenges utilizing interpersonal skills, excellent time management and problem-solving skills. ADDITIONAL INFORMATION: Involved with ASIC Design for the past 26 years. Experienced in micro-architecture, RTL entry, synthesis, and validation. Also have experience in product development from initial concept through design and test. Many of those designs have seen silicon. Detail oriented with excellent technical documentation. Ability to maintain schedules. Strong with leadership, mentoring, decision-making, creative thinking, technical analysis and communication skills.
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Responsible for installing, upgrading, calibrating, and maintaining life-saving radiotherapy equipment for linear accelerators, Kv/Mv Imaging and oncology systems. Directly engaged at hospital and clinical sites. Delivers results through exemplary problem solving, critical thinking and diagnostic abilities. Solves technical problems quickly and efficiently often with limited time or supplies. Knowledgeable in health and medical equipment, anatomy and terminology. Strong mathematics and quantitative skills. Specializes in hydraulics, mechanic, pneumatics, component level troubleshooting, radiographic principles and more. Excellent communication abilities. Experienced with diagnostics, repair, and maintenance of technical equipment. Utilizes analytical skills to identify and resolve issues quickly and efficiently. Track record of strong communication and client management, ensuring high levels of customer satisfaction. Professional technical expert with robust background in field service engineering. Directed the installation, upgrading, calibration, and maintenance of critical radiotherapy equipment for linear accelerators and oncology systems. Engaged proactively with hospital and clinical teams to ensure operational efficiency. Cultivated strong client relationships, enhancing overall customer satisfaction.
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